1. Field
Embodiments of the present disclosure generally relate to methods and apparatus for depositing film layers on a substrate.
2. Description of the Related Art
A hardmask, such as amorphous hydrogenated carbon, prevents damage and deformation of delicate materials, such as silicon dioxide or carbon doped silicon oxide. In addition, a hardmask layer may act as an etch mask in conjunction with conventional lithographic techniques to prevent the removal of a material during etching.
A hardmask that is highly transparent to optical radiation, i.e., light wavelengths between about 400 nm and about 700 nm, is desirable in some applications, such as lithographic processing. Transparency to a particular wavelength of light allows for more accurate lithographic registration, which in turn allows for precise alignment of a mask with specific locations on substrate. The transparency of a material to a given frequency of light is generally quantified as the extinction coefficient of a material, also referred to as the absorption coefficient (κ). For example, for an amorphous hydrogenated carbon layer that is approximately 6000 Å to 7000 Å thick, the amorphous hydrogenated carbon layer should have an absorption coefficient of 0.12 or less at the frequency of light used for the lithographic registration, for example 630 nm, otherwise the mask may not be aligned accurately. A layer with absorption coefficient greater than 0.12 may also be used, but layer thickness may have to be reduced to achieve accurate lithographic registration. Regarding overlay error, high κ values do not result in overlay error, but high κ range may result in overlay error.
Amorphous hydrogenated carbon, also referred to as amorphous carbon and denoted α-C:H, is essentially a carbon material with no long-range crystalline order which may contain a substantial hydrogen content, for example on the order of about 10 to 45 atomic %. The α-C:H is used as a hardmask material in semiconductor applications because of its chemical inertness, optical transparency, and good mechanical properties. While α-C:H films can be deposited via various techniques, plasma enhanced chemical vapor deposition (PECVD) may be used due to cost efficiency and film property tunability. In a typical PECVD process, plasma is initiated in a chamber to create, for example, excited CH— radicals. The excited CH— radicals are chemically bound to the surface of a substrate positioned in the chamber, forming the α-C:H film thereon.
Between one layer and the next layer that overlays the previous one, the individual patterns of the one layer and the next layer should be aligned. A measurement of alignment marks may be obtained by a metrology tool which is then used by a lithography tool to align the subsequent layers during exposure and again after a lithography process to recheck a performance of the alignment. However, overlay errors between layers are inevitable, and error budgets are calculated by integrated circuit designers for which manufacturing must meet. Overlay error budget is defined as errors induced by lithographic scanner inaccuracy/misalignment, non-linear process with-in film variations, mask-to-mask variations, and metrology errors. Overlay errors of the device structure may originate from different error sources, such as overlay errors from previous exposure tool, current exposure tool, a matching error between the overlay errors of the previous exposure tool/metrology tool and of the current exposure tool/metrology tool, or substrate film layer deformation caused by film stress.
As device dimensions continue to shrink, next-generation lithography (NGL) processes should have overlay error budget of <6-8 nm within a substrate. During, for example, PECVD processes, local partial pressures, temperature, residence time and/or reactivity of gaseous components may give a non-uniform morphology of the deposited film, wherein, for example, local stress of the film differs in various regions of the film. Such non-uniform morphology results in overlay errors locally at various regions on the film. Furthermore, next generation CVD hardmask films contribute >50% of overlay error, significantly reducing device yield and performance. There is a need in the art to reduce overlay error within deposited multilayers and a need for a method of depositing a material layer useful for integrated circuit fabrication which can be conformally deposited on substrates having topographic features.